The present invention relates to a sense amplifier circuit for a read only memory (ROM) in a complementary metal-oxide-semiconductor (CMOS) integrated circuit.
In a sense amplifier circuit for judging output levels of a ROM in a CMOS integrated circuit, a high speed is generally required for the judgment. MOS transistors are selectively formed in the cells in a manner to form a dynamic ROM of the AND type. In a precharge mode, negative charges are stored in a stray capacitor formed at the output of the ROM. In a read mode, the charge is discharged through a specified cell. In this case, the discharge is prohibited or allowed in accordance with the presence or absence of the transistor, respectively. When the discharge is allowed, the level of the output terminal rises. An access time taken for the output level to reach a given threshold level is shorter as the stray capacitance is smaller. When the capacity of the ROM is made large, the stray capacitance becomes large, with the result that the access time is long. There has been an approach to solve this problem in which a large capacity ROM is divided into a plurality of small capacity ROM arrays, and output signals from those ROM arrays are level-judged and then the output signal is produced from the judged signals with a logic circuit. This approach, however, has a disadvantage of increase of the elements.
An inverter for the output level judgment is constructed of a CMOS circuit. In this circuit construction, when the output level is higher than a threshold level of an N channel transistor but lower than a threshold level of a P channel transistor, both the transistors are conductive, so that a through current falls therethrough, resulting in unnecessary power consumption. Although the access time to the ROM can be made short by lowering the threshold level of the inverter, there is a limit in lowering the threshold level.